CPU Architecture Notes | Basic Computer Engineering | RGPV BTech First Year
CPU Architecture Notes | Basic Computer Engineering | RGPV BTech First Year
CPU Architecture
CPU Architecture Basic Computer Engineering рдХрд╛ рдПрдХ рдЕрддреНрдпрдВрдд рдорд╣рддреНрд╡рдкреВрд░реНрдг рд╡рд┐рд╖рдп рд╣реИред CPU (Central Processing Unit) рдХреЛ Computer рдХрд╛ Brain рдХрд╣рд╛ рдЬрд╛рддрд╛ рд╣реИ рдХреНрдпреЛрдВрдХрд┐ рдпрд╣реА рд╕рднреА Instructions рдХреЛ Execute рдХрд░рддрд╛ рд╣реИ рддрдерд╛ Data Processing рдХрд╛ рдореБрдЦреНрдп рдХрд╛рд░реНрдп рдХрд░рддрд╛ рд╣реИред рдХрд┐рд╕реА рднреА Computer System рдХреА Performance рдореБрдЦреНрдп рд░реВрдк рд╕реЗ CPU Architecture рдкрд░ рдирд┐рд░реНрднрд░ рдХрд░рддреА рд╣реИред
Introduction
CPU Architecture рдЙрд╕ Internal Structure рдХреЛ рджрд░реНрд╢рд╛рддреА рд╣реИ рдЬрд┐рд╕рдХреЗ рдорд╛рдзреНрдпрдо рд╕реЗ Processor Instructions рдХреЛ Fetch, Decode рддрдерд╛ Execute рдХрд░рддрд╛ рд╣реИред CPU рдореЗрдВ рд╡рд┐рднрд┐рдиреНрди Components рд╣реЛрддреЗ рд╣реИрдВ рдЬреЛ рдорд┐рд▓рдХрд░ Program Execution рдХреЛ рд╕рдВрднрд╡ рдмрдирд╛рддреЗ рд╣реИрдВред
рдЬрдм рдХреЛрдИ User Program Execute рдХрд░рддрд╛ рд╣реИ рддрдм CPU Memory рд╕реЗ Instructions рдкреНрд░рд╛рдкреНрдд рдХрд░рддрд╛ рд╣реИ, рдЙрдиреНрд╣реЗрдВ рд╕рдордЭрддрд╛ рд╣реИ рддрдерд╛ рдЖрд╡рд╢реНрдпрдХ Operations рдХреЛ Perform рдХрд░рддрд╛ рд╣реИред
Definition of CPU
CPU (Central Processing Unit) Computer рдХрд╛ рд╡рд╣ рдореБрдЦреНрдп рднрд╛рдЧ рд╣реИ рдЬреЛ рд╕рднреА Arithmetic, Logical рддрдерд╛ Control Operations рдХреЛ Execute рдХрд░рддрд╛ рд╣реИред
CPU = Control Unit + Arithmetic Logic Unit + Registers
Main Components of CPU Architecture
- Arithmetic Logic Unit (ALU)
- Control Unit (CU)
- Registers
- Cache Memory
- Buses
- Clock Unit
1. Arithmetic Logic Unit (ALU)
ALU CPU рдХрд╛ рд╡рд╣ рднрд╛рдЧ рд╣реИ рдЬреЛ Arithmetic рддрдерд╛ Logical Operations рдХреЛ Perform рдХрд░рддрд╛ рд╣реИред
- Addition
- Subtraction
- Multiplication
- Division
- AND Operation
- OR Operation
- NOT Operation
- Comparison Operations
2. Control Unit (CU)
Control Unit рдкреВрд░реЗ Computer System рдХреЛ рдирд┐рдпрдВрддреНрд░рд┐рдд рдХрд░рддреА рд╣реИред рдпрд╣ Instruction Fetch, Decode рддрдерд╛ Execute Process рдХреЛ рд╕рдВрдЪрд╛рд▓рд┐рдд рдХрд░рддреА рд╣реИред
- Instruction Control
- Data Flow Management
- Resource Coordination
- Execution Control
3. Registers
Registers CPU рдХреЗ рдЕрдВрджрд░ рд╕реНрдерд┐рдд High Speed Storage Locations рд╣реЛрддреЗ рд╣реИрдВ рдЬрд┐рдирдХрд╛ рдЙрдкрдпреЛрдЧ Temporary Data Storage рдХреЗ рд▓рд┐рдП рдХрд┐рдпрд╛ рдЬрд╛рддрд╛ рд╣реИред
| Register | Function |
|---|---|
| Accumulator | Stores Intermediate Results |
| Program Counter | Stores Next Instruction Address |
| Instruction Register | Stores Current Instruction |
| Memory Address Register | Stores Memory Address |
| Memory Data Register | Stores Memory Data |
4. Cache Memory
Cache Memory CPU рдФрд░ Main Memory рдХреЗ рдмреАрдЪ рд╕реНрдерд┐рдд High Speed Memory рд╣реЛрддреА рд╣реИред рдЗрд╕рдХрд╛ рдЙрдкрдпреЛрдЧ Frequently Accessed Data рдХреЛ Store рдХрд░рдиреЗ рдХреЗ рд▓рд┐рдП рдХрд┐рдпрд╛ рдЬрд╛рддрд╛ рд╣реИред
- L1 Cache
- L2 Cache
- L3 Cache
5. Bus Architecture
Bus рд╡рд╣ Communication Path рд╣реИ рдЬрд┐рд╕рдХреЗ рдорд╛рдзреНрдпрдо рд╕реЗ CPU, Memory рддрдерд╛ Input/Output Devices Data Exchange рдХрд░рддреЗ рд╣реИрдВред
| Bus Type | Function |
|---|---|
| Data Bus | Transfers Data |
| Address Bus | Transfers Addresses |
| Control Bus | Transfers Control Signals |
CPU Working Cycle
CPU рдореБрдЦреНрдп рд░реВрдк рд╕реЗ Fetch Decode Execute Cycle рдкрд░ рдХрд╛рд░реНрдп рдХрд░рддрд╛ рд╣реИред
- Instruction Fetch
- Instruction Decode
- Instruction Execute
- Store Result
Step 1: Fetch
Program Counter рдЕрдЧрд▓реЗ Instruction рдХрд╛ Address рдкреНрд░рджрд╛рди рдХрд░рддрд╛ рд╣реИ рдФрд░ Instruction Memory рд╕реЗ Fetch рдХрд┐рдпрд╛ рдЬрд╛рддрд╛ рд╣реИред
Step 2: Decode
Control Unit Instruction рдХреЛ Decode рдХрд░рддреА рд╣реИ рддрдерд╛ Operation рдирд┐рд░реНрдзрд╛рд░рд┐рдд рдХрд░рддреА рд╣реИред
Step 3: Execute
ALU рдЕрдерд╡рд╛ рдЕрдиреНрдп Components Instruction рдХреЛ Execute рдХрд░рддреЗ рд╣реИрдВред
Step 4: Store
Execution Result рдХреЛ Register рдпрд╛ Memory рдореЗрдВ Store рдХрд┐рдпрд╛ рдЬрд╛рддрд╛ рд╣реИред
Types of CPU Architecture
- CISC Architecture
- RISC Architecture
| Feature | CISC | RISC |
|---|---|---|
| Instruction Set | Large | Small |
| Execution Speed | Moderate | High |
| Complexity | High | Low |
Characteristics of CPU Architecture
- High Speed Processing
- Instruction Execution Capability
- Efficient Resource Utilization
- Multi-tasking Support
- Memory Management
- Control Operations
Advantages
- Fast Data Processing
- High Computational Power
- Efficient Program Execution
- Supports Multi-tasking
- Reliable Operations
Limitations
- High Power Consumption
- Heat Generation
- Complex Design
- Costly High-End Processors
Applications
- Desktop Computers
- Laptops
- Servers
- Mobile Devices
- Artificial Intelligence Systems
- Cloud Computing
- Scientific Computing
- Embedded Systems
Industrial Importance
- Data Centers
- Supercomputers
- Automation Systems
- Telecommunication Networks
- Defense Applications
- Medical Equipment
Viva Questions
- What is CPU Architecture?
- Why is CPU called the Brain of Computer?
- What is ALU?
- What is Control Unit?
- What are Registers?
- What is Cache Memory?
- What is Data Bus?
- What is Address Bus?
- What is Control Bus?
- Differentiate between RISC and CISC.
Exam Oriented Important Questions
- Define CPU Architecture.
- Explain the Components of CPU.
- Describe the Fetch Decode Execute Cycle.
- Write a Note on Cache Memory.
- Differentiate between RISC and CISC Architecture.
- Explain the Functions of Registers.
- Describe Bus Architecture in CPU.
Conclusion
CPU Architecture Computer System рдХрд╛ рд╕рдмрд╕реЗ рдорд╣рддреНрд╡рдкреВрд░реНрдг рднрд╛рдЧ рд╣реИред рдпрд╣ Instruction Processing, Data Management рддрдерд╛ Control Operations рдХреЛ рд╕рдВрдЪрд╛рд▓рд┐рдд рдХрд░рддрд╛ рд╣реИред рдЖрдзреБрдирд┐рдХ Computing Systems рдХреА Performance рдореБрдЦреНрдпрддрдГ CPU Architecture рдкрд░ рдирд┐рд░реНрднрд░ рдХрд░рддреА рд╣реИред рдЗрд╕рд▓рд┐рдП Basic Computer Engineering рдХреЗ рдЕрдзреНрдпрдпрди рдореЗрдВ CPU Architecture рдХреА рд╕рдордЭ рдЕрддреНрдпрдВрдд рдЖрд╡рд╢реНрдпрдХ рд╣реИред
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